Chapter 11. Measuring Slips

One major problem encountered, after designing a timing network, is evaluating its performance. Standard tests for large switching systems and clock distribution systems require the use of a Cesium or Rubidium standard. A much simpler method of verifying performance is to use test equipment that displays bit slip. A reference is required in order to use such equipment effectively.

The 5404 Performance Monitor Card in the STS 5400 system is a complete synchronization test set with five inputs and 5 nS resolution. Time Interval Error (TIE), Maximum Time Interval Error (MTIE), wander and jitter, bit slip, as well as other data may be gathered by the 5404 on the system's inputs. There are three uncommitted inputs which may be assigned to the largest and most critical network elements being timing. The outputs of such elements may be fed back to the 5404 to monitor the slave clocks that are part of the systems being driven.

When a synchronous slip can be tolerated, the 5320 Timing Insertion Unit may be used as a buffer between DS1 synchronous systems. The 5320 is a natural choice for removing SONET phase instabilities.

The STS 5800 List 5 system may provide a complete stand alone test system as it has the features of the 5404 Performance Monitor Card and the GPS Stratum 1 receiver all in one small unit.